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Posted 12 hours ago

http://syprog.blogspot.com/2011/12/simple-virtual-machine.html

Summary: here’s how to design a computing machine and tools to build programs for it. Oh, and here are the actual machine and tools, too.

I love articles like this because they’re a reminder of how simple computers are. They move electrons from one place to another in a predictable fashion. Sure, any hardware or software out in the real world is many times more complex than the little virtual machine in this article, but it’s reassuring from time to time to clear away the outer layers of computing and confirm that it’s quite simple inside.

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Posted 18 hours ago
I feel like Neo when the plug gets yanked out of his head: “I know JTAG.” Except I really don’t, and it took three days instead of three seconds. JTAG is a little like SPI. You send bytes to the slave, the slave does something with them, and then you get bytes back. The protocol is clocked by the master, and you shift TDI bits out as you’re reading in TDO bits. But as far as I can tell, the timing is intolerant compared to SPI, at least on the XC9572XL that I’m trying hard not to destroy. The slightest change in clock pulse width gets the incoming TDO bits completely out of sync. Ben’s code shows a lot of hard work on his part getting this timing exactly right for his Papilio, but the adjustments need to be redone for Arduino. I’m getting more handy with a logic analyzer; my favorite trick to date is the “debug line” that sets an extra pin high when a certain interesting event is about to happen, making it very easy to scroll to the right part of the logic timeline. It’s the equivalent to sticking a debug printf into software. I doubt I’m the first person to invent that one.

I feel like Neo when the plug gets yanked out of his head: “I know JTAG.” Except I really don’t, and it took three days instead of three seconds.

JTAG is a little like SPI. You send bytes to the slave, the slave does something with them, and then you get bytes back. The protocol is clocked by the master, and you shift TDI bits out as you’re reading in TDO bits. But as far as I can tell, the timing is intolerant compared to SPI, at least on the XC9572XL that I’m trying hard not to destroy. The slightest change in clock pulse width gets the incoming TDO bits completely out of sync. Ben’s code shows a lot of hard work on his part getting this timing exactly right for his Papilio, but the adjustments need to be redone for Arduino. I’m getting more handy with a logic analyzer; my favorite trick to date is the “debug line” that sets an extra pin high when a certain interesting event is about to happen, making it very easy to scroll to the right part of the logic timeline. It’s the equivalent to sticking a debug printf into software. I doubt I’m the first person to invent that one.

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Posted 20 hours ago

Blog commenting added

I’ve decided that the “Write simple blog software with incredible commenting system” task on my to-do list will never get checked off, so I’ve given in and added Disqus commenting to this blog.

I look forward to hearing from you!

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Posted 1 day ago

Found a good base for an XSVF player

Small world. Ben over at the Papilio Forums had almost the same needs as mine: wants to program an XC9572XL, prefers not to buy overpriced, single-purpose cables. So he adapted the XAPP058 reference code to a Papilio, cleverly using the desktop machine as a conduit between the potentially large xsvf file and the firmware.

I didn’t try to get Ben’s code running on the Papilio, because I have a different strategy in mind. I have ported the device portion to the Arduino, and I’m going to rewrite the tiny C-based desktop client in Python. It would be odd for someone to have a CPLD but not have an Arduino within arm’s reach, and while every hobbyist should have a Papilio (hi Jack!), it’s less common. As for the command-line tool, it’s straightforward I/O, which means Python’s the perfect choice to get Mac/Windows/Linux/wristwatch support for free. Last night I got the Arduino communicating with the C client just enough for the Arduino to start sending debug messages telling me it was very confused about its purpose in life. Tonight I hope to get it able to program something on the ‘9572, and then I’ll have a known-good toolchain against which to develop the Python client.

Just a bit of pontificating about using the right tool for the job. It makes me sad when projects with a cross-platform audience use .BAT files, and it makes me sad any time I see C/C++ where cycle-for-cycle performance isn’t an issue. For shell scripts, use Bash. Install Cygwin if your favorite OS is one of the… one that doesn’t know Bash. And for pretty much every other desktop tool you can think of, consider Python rather than C. People reflexively think of C as the go-to language for portability, but at the tool level where you care more about how to open a nonblocking serial port rather than the endianness of an int, Python remains portable where C starts spewing out #ifdefs.

Anyway, back to the topic. When this project is done, any maker will be able to program a Xilinx CPLD with the hardware and OS he or she already has. No more ridiculous $50 cables.

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Posted 2 days ago

Arduino XSVF Player?

I want to program a Xilinx XC9572XL and refuse to buy a $50 dongle to do so. Keywords in my research so far: xapp058, XSVF, SVF, JTAG, arduiggler. There is an FT232-based version that seems very close to what I want, but it’s written in Visual Basic, of all things, and probably won’t work on a modern non-FTDI Arduino.

If you’re reading this and do contract programming in exchange for karma, please write it in Python to avoid cross-platform issues!

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Posted 3 days ago
Digilent Nexys 2 running through its demo program. I completed a VHDL tutorial last night that displayed the hexadecimal version of the first four switches acting as bits. The Digilent Linux tools aren’t so great, at least compared to the screenshots of the Windows tools, but they do work after a little prodding. It’s odd that Digilent would consider their USB firmware proprietary, leading to a lot of inefficient effort on the part of various Linux hackers to reverse-engineer it. What exactly is Digilent protecting? It’s a bootloader for a $150 low-end design tool, big deal. Someone should build an FPGA board like this with an ATmega32u4 as the USB frontend. It’ll look like an Arduino Leonardo to the PC, but it’ll have super powers. Zoom

Digilent Nexys 2 running through its demo program. I completed a VHDL tutorial last night that displayed the hexadecimal version of the first four switches acting as bits. The Digilent Linux tools aren’t so great, at least compared to the screenshots of the Windows tools, but they do work after a little prodding.

It’s odd that Digilent would consider their USB firmware proprietary, leading to a lot of inefficient effort on the part of various Linux hackers to reverse-engineer it. What exactly is Digilent protecting? It’s a bootloader for a $150 low-end design tool, big deal. Someone should build an FPGA board like this with an ATmega32u4 as the USB frontend. It’ll look like an Arduino Leonardo to the PC, but it’ll have super powers.

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Posted 4 days ago
This is the version of the Papilio One as built by SeeedStudio. It’s possible that versions built by other manufacturers are slightly different; it’s open-source hardware, so in theory many people might build it. These notes are for Linux (Ubuntu 11.10 in my case). The headers arrive separate from the board. You’ll need to cut off sections with wire cutters, and you should expect and plan to sacrifice one pin per cut. Then if you’re at all aesthetically motivated, sand down the rough edge with garnet sandpaper before soldering to the board. Attaching to a VGA monitor and USB is easy enough; no surprises there. But you’ll immediately wish you had a DB9-friendly joystick (buy an old Atari 2600 joystick on eBay if you want the intended hardware). The first thing you’ll want to do is put something on the Papilio/Arcade Wing. The GitHub repository contains the stuff you need, but if you want it to work on Linux, start with my fork. The following instructions assume you’re using my fork and are trying to get Pac-Man to run on your new Papilio Arcade Wing. cd pacman_rel004_sp3e_papilio. All the remaining directories are relative to that one. cd romgen_source and build the executable: g++ romgen.cpp -o romgen Find Pac-Man ROMs matching those described in the top of the file scripts/merge_roms_pacman. You want the bootleg version that runs on Galaxian hardware, called Puckman. Put them in roms/. cd scripts ./merge_roms_pacman Now you’ve created a Xilinx bitfile that will run Pac-Man, and the next set of instructions loads it. Download the loader (that’s a fragile link, sorry). We’ll assume that you’ve managed to put papilio-prog into your path (look in the zipfile in Helper_App/linbin). sudo apt-get install libftdi-dev. This lets papilio-prog talk to the FTDI USB chip on the Papilio. Make sure your Papilio is plugged via USB and the VGA monitor it’s connected to is on. papilio-prog -f bit_files/pacman_on_pacman_hardware_p1_500K.bit Within about 1500 milliseconds your VGA monitor will start running Pac-Man. Zoom

This is the version of the Papilio One as built by SeeedStudio. It’s possible that versions built by other manufacturers are slightly different; it’s open-source hardware, so in theory many people might build it. These notes are for Linux (Ubuntu 11.10 in my case).

  • The headers arrive separate from the board. You’ll need to cut off sections with wire cutters, and you should expect and plan to sacrifice one pin per cut. Then if you’re at all aesthetically motivated, sand down the rough edge with garnet sandpaper before soldering to the board.
  • Attaching to a VGA monitor and USB is easy enough; no surprises there. But you’ll immediately wish you had a DB9-friendly joystick (buy an old Atari 2600 joystick on eBay if you want the intended hardware).
  • The first thing you’ll want to do is put something on the Papilio/Arcade Wing. The GitHub repository contains the stuff you need, but if you want it to work on Linux, start with my fork.

The following instructions assume you’re using my fork and are trying to get Pac-Man to run on your new Papilio Arcade Wing.

  1. cd pacman_rel004_sp3e_papilio. All the remaining directories are relative to that one.
  2. cd romgen_source and build the executable: g++ romgen.cpp -o romgen
  3. Find Pac-Man ROMs matching those described in the top of the file scripts/merge_roms_pacman. You want the bootleg version that runs on Galaxian hardware, called Puckman. Put them in roms/.
  4. cd scripts
  5. ./merge_roms_pacman

Now you’ve created a Xilinx bitfile that will run Pac-Man, and the next set of instructions loads it.

  1. Download the loader (that’s a fragile link, sorry). We’ll assume that you’ve managed to put papilio-prog into your path (look in the zipfile in Helper_App/linbin).
  2. sudo apt-get install libftdi-dev. This lets papilio-prog talk to the FTDI USB chip on the Papilio.
  3. Make sure your Papilio is plugged via USB and the VGA monitor it’s connected to is on.
  4. papilio-prog -f bit_files/pacman_on_pacman_hardware_p1_500K.bit
  5. Within about 1500 milliseconds your VGA monitor will start running Pac-Man.
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Posted 5 days ago

Board design improvements

As I improve the board design in my head, I think I can eliminate the EEPROM and downgrade the ATmega to an ATtiny. The design will now read files off an SD card instead. The ATtiny will populate a bank of the SRAM and present that to the 6809 as ROM, using the CPLD as a stand-in for a series of ‘595s. The ‘tiny will also load the FPGA, both from files on the SD card. I’m assuming that Xilinx FPGAs can be loaded with SPI or something similarly pin-frugal. This feels like a better, more modern approach. Moreover, I wasn’t looking forward to reflashing the EEPROM throughout development.

Also, an amendment to my component count estimate: I forgot about power. So we need to add a few SOT-23 LDOs for the various voltages (1.8, 3.3, 5.0). But it’ll still be a very small board.

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Posted 6 days ago

AND gate written

I got something to build in the Xilinx ISE:

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity foo is
    Port ( port0 : in  STD_LOGIC;
           port1 : in  STD_LOGIC;
           port_out : out  STD_LOGIC);
end foo;

architecture Behavioral of foo is
begin
 port_out <= port0 and port1;
end Behavioral;

All it does is (in theory) set a high voltage on one pin when a high voltage is set on two other pins. But it’s a start.

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Posted 6 days ago

Board sent off to the factory

No, not the replacement for the Mess O’ Wires. This is the Dangerous Prototypes XC9500XL CPLD Breakout Board. I’ve ordered from DorkbotPDX, and my batch should be going to the fab today. (As a side note, I don’t feel too bad about depriving DP of revenue. I own one of approximately every other thing they’ve sold, and I couldn’t wait for the many-week shipment time from SeeedStudio.)

As I investigate (naively) the capabilities of this device, I’m pretty sure I ought to be able to duplicate all of Joust with the following:

  • A Xilinx Spartan of some kind to reproduce the main chips (6809E, two 6821s, a 6808 for sound, and the “special” SC2) and a lot of the glue among them.
  • One of these little CPLDs for things like the Q/E clock generator and other glue that might not fit on the Spartan. (Actually, I doubt it’ll be necessary at all, but I’m rationalizing it now so I can start working on programmable logic before the Spartan arrives.)
  • An SRAM.
  • An EEPROM to hold the game code.
  • The 4MHz oscillator.
  • An ATmega of some kind to load up the Spartan and maybe manage resets.
  • A bunch of resistors for video, and capacitors for power decoupling.

Unless I’m missing something major, this will be a pretty tiny board, compared to the original five Joust boards!

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